Keynote: Solving the Conundrum of Custom Instructions

on YouTube ↗14m

" summary

Custom RISC‑V extensions deliver domain‑specific speedups but force extra RTL, modeling, verification and toolchain work; Imperas supplies configurable fast processor models and virtual platforms, automated functional coverage (about 200,000 lines of SystemVerilog for coverage tests) and RTL‑model comparison that discovers integration bugs (typically 20–30 bugs found in the example core). Booting Linux on RTL currently takes ~40 hours but hardware‑assisted flows aim to cut that to ~5 minutes, letting teams iterate designs and instruction sets quickly.

AI-written summary · about

" chapters (6)

1. 0:00Introduction and keynote overview
2. 1:50Why RISC-V is attractive
3. 3:56Challenges of custom instructions
4. 6:21Imperas modeling solutions
5. 9:50Verification with custom instructions
6. 12:57Cost of freedom in RISC-V

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