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The Challenges in Supporting Multiple Safety Levels in the Same System

Talkat RISC-V Summit North America 2023 · on Wednesday, 2023-11-08· at 14:15· Theater (Level 2)· [embedded-and-hardware]
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Argues that ASIL-A infotainment and ASIL-D ADAS can coexist on one chip by combining RISC-V + MIPS cores (P family for single‑thread performance, M family for multithreading), using safety island or mixed integrity decomposition, sensor fusion/true redundancy (MobilEye example), and out-of-context certification to reuse IP and cut certification time by about six months. Explains lockstep vs parity/ECC tradeoffs, running diagnostics in idle threads, and shows this reduces cost pressure (OEM margin example: Mercedes ~$7,000 per car) while meeting safety goals.

AI-written summary · about

  1. 0:00Introduction and background
  2. 1:07MIPS in automotive market
  3. 2:34MIPS core families for safety
  4. 5:02Functional safety levels explained
  5. 7:32Cost and complexity challenges
  6. 10:00System element out of context
  7. 11:04Mixed integrity level systems
  8. 12:09Autonomous driving levels
  9. 15:40True redundancy in systems
  10. 17:50Multi-threading for safety
  11. 19:15Key takeaways and conclusion
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