~/talk

Demo: Secure and Open Source RISC-V Based Flight Computer

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TII builds an open-source RISC-V flight computer called Al Saqr that combines a host CPU, a parallel programmable AI accelerator for on-board perception, and a security subsystem extended from OpenTitan root of trust. The silicon implements IO MMU, PMU support, extra instructions to mitigate Spectre/Meltdown, a secure mailbox, PUFs, logic locking for supply-chain control, and a hypervisor hosting three isolated OSes; first silicon sits in the lab and is about to tape out. Novel tooling includes LLMs for spec analysis that already flag issues.

AI-written summary · about

  1. 0:00Introduction and background
  2. 1:04Flight computer system overview
  3. 2:26Security threats and mitigations
  4. 3:32Alsocar SOC platform details
  5. 5:45Zero trust research approach
  6. 7:31Emerging security technologies
  7. 9:38Future research and collaboration
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