The RISC-V Zjid Extension
summary
Defines an architected sequence to make code updates safe on implementations with incoherent I/D caches and introduces CMODX rules: an instruction fetch ordering rule plus modification and atomicity constraints to avoid torn instructions. Shows exact code sequence—store, clean.id, fence, inval.i, fence, import.i—and JIT patterns: publishing, CODX to avoid full invalidates, and bait‑and‑switch. Hardware must provide 2/4‑byte fetch atomicity; coherent systems can elide many microarchitectural steps. No complete formal proof is shown, but the design rests on decades of implementation experience.
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chapters (14)
- 0:00Introduction to Zjid
- 0:22Point of instruction visibility
- 1:44Publishing instructions pattern
- 3:13Rules for JIT modifications
- 4:15Software requirements
- 4:59Hardware atomicity requirements
- 6:01Fetching modified instructions
- 7:05JIT example with branch
- 8:29Fetch ordering rule
- 9:32JIT example with jump table
- 10:58Import DOI necessity
- 11:19Game bait and switch technique
- 12:20Coherent ID caching
- 13:26Q&A session
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