Towards Scalable Confidential Computing on RISC-V
summary
Proposes a RISC‑V architecture to host true confidential VMs by adding a memory tracking table (MTT) and supervisor domains (SMMT) that enforce physical page ownership while keeping existing SV and hypervisor page models, plus an IMT checker to tie device IOMMUs into those domains and simple interrupt binding so devices can be safely assigned. Specifies a CoVE ABI for lifecycle ops and attestation chaining to a hardware root of trust like OpenTitan, largely spec proposals with Keystone demos and some ratified extensions.
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chapters (8)
- 0:00Introduction to project
- 1:06Confidential computing basics
- 2:52Threat modeling and goals
- 4:07Trusted execution requirements
- 5:50Reference architecture
- 9:30ISA mechanisms
- 16:38Non-ISA and ABI capabilities
- 21:24Call to action and summary
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