Keynote: Innovation Secured: A Paradigm Shift in the Processor Industry
Talkat RISC-V Summit North America 2023 · on Wednesday, 2023-11-08· at 10:10· Mission City Ballroom B2 - B5·
summary
Claims that ~70% of CVEs are memory-safety bugs and that rewriting a trillion lines of C is economically impossible lead to a different fix: hardware capabilities. The solution described is Cherry capabilities — smart pointers carrying bounds and validity metadata that enable fine-grained memory protection and compartmentalization, require recompilation but not full rewrites, and can be toggled on or off. A first commercial implementation is built on a Codasip A730 application processor and is demonstrated running at the booth, with a working visual demo.
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