The Application of RISC-V Extensions to Automotive Zonal Controllers
summary
Automotive systems consolidate dozens of ECUs into zonal controllers and claim RISC‑V extensions—SPMP as MPU‑like partitioning, PMP and the Hypervisor—actually isolate mixed‑critical workloads so ASIL‑D functions run alongside ASIL‑B and rich OS tasks without certifying the whole chip. Example specifics: SPMP enables RTOS task stack/data purge and memory partitioning without an MMU; the hypervisor plus secure‑boot/root‑of‑trust firmware enforces timing and info isolation and therefore hypervisor must be ASIL‑D certified to protect ASIL‑D tasks and reduce BOM by avoiding ASIL‑D for whole chip.
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chapters (10)
- 0:00Introduction to RISC-V in automotive
- 1:48Automotive trends and challenges
- 3:32Safety and security requirements in zonal controllers
- 5:24RISC-V extensions for mixed-criticality systems
- 8:39SPMP for memory and task isolation
- 11:13Hypervisors and execution modes in RISC-V
- 13:26Security mechanisms enabling safety functions
- 15:15Benefits of single-chipset integration
- 16:24Certification and hardware requirements
- 19:41Q&A and closing remarks
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