Keynote: Shaping the Future of Automotive Computing with RISC-V

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" summary

Claims that RISC-V provides a single ISA from tiny body-electronics MCUs up to ADAS zonal controllers, and that real-time determinism needs custom extensions to meet automotive latency and ASIL D safety. Notes virtualization via the H extension, hypervisor guest/virtual supervisor physical memory protection and the APLIC interrupt model to enable mixed-criticality without full re-certification. Describes Synopsys’ ARC V portfolio of embedded, real-time and host cores built on an ISO 9001 QMS and adding ISO 26262 and ISO 21434 features.

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" chapters (7)

1. 0:00Automotive industry evolution
2. 1:11Architecture and safety trends
3. 4:08RISC-V for software vehicles
4. 6:26Real-time virtualization
5. 8:36Synopsys processor portfolio
6. 9:19RISC-V ecosystem and future
7. 10:15Summary and closing remarks

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