RISC-V CPU Development Using Olympia Performance Model

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" summary

Describes using the Olympia performance model (C++), built on the Sparta framework, as a trace-driven simulator ingesting STF traces (examples: DRYSTONE). A small-core run shows IPC ≈ 0.438; widening to a medium core yields only ~8% IPC uplift; adding a second branch unit removes branch stalls but IPC stays flat. Debugging with Argos pipes and retire performance events finds four-cycle bubbles caused by a cache-response ordering bug; reordering events fixes the model and restores 1.0 IPC.

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" chapters (7)

1. 0:00Introduction and agenda
2. 0:58Value of performance modeling
3. 3:00Overview of Olympia model
4. 7:11Analysis and simulation flow
5. 10:50Running workload experiments
6. 15:45Debugging performance issues
7. 26:06Conclusion and summary

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