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Making the Case for a Keccak Instruction

Talkat RISC-V Summit North America 2024 · on Wednesday, 2024-10-23· at 14:35· Theater (Level 2)· [cryptography]
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slides:none on file

Proposes a dedicated Keccak/SHA3 instruction that packs the 1600-bit Keccak state across vector registers and an operand collector, showing the permutation costs ~2,000 software cycles vs ~24 cycles in hardware. Benchmarks on Kyber and Dilithium find 60–80% of cycles spent in Keccak; handwritten intrinsics give ~3× speedup, but a single instruction yields an order-of-magnitude (10×+) improvement, saving significant server TLS CPU and energy and working on prototype silicon with 256-bit collectors.

AI-written summary · about

  1. 0:00Introduction to Keccak instruction
  2. 1:50Current RISC-V crypto standards
  3. 3:36Post-quantum cryptography standards
  4. 6:47Performance impact on post-quantum crypto
  5. 9:16Keccak’s software bottleneck
  6. 12:06Proposal for Keccak instruction
  7. 17:22Conclusion and next steps
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