~/talk

Lessons Learned in Using RISC-V for Generative AI and Where We Can Go from Here

Talkat RISC-V Summit North America 2024 · on Tuesday, 2024-10-22· at 13:55· Grand Ballroom G (Level 1)· [machine-learning]
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Generative AI workloads hit a memory and compute wall, so Esperanto builds RISC-V based inference accelerators and software that actually run open LLMs: EToc1 ships with 32 GB LPDDR4 on EToc1, implements block 4-bit quantization to store weights and claims 4× data fetch speed with 4-bit quantization, and reports 2.4× measured end-to-end speedup so far. Early ISA-required custom SIMD uses ~40 instructions and 16 registers to load a cache line; adding RVV and a 2D tensor register drastically cuts instruction count and improves overlap of prefetch and compute.

AI-written summary · about

  1. 0:00Introduction and challenges
  2. 0:50Generative AI walls
  3. 1:20Energy and deployment costs
  4. 5:17Esperanto strategy overview
  5. 5:39Software stack evolution
  6. 10:27Blocking quantization
  7. 10:43Dequantization kernels
  8. 18:13Conclusion
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