Democratizing Inference of Open-weight Models on RISC-V Manycore Acc...
summary
Ainekko presents an open RISC‑V manycore inference platform: a low‑power 20–50 W chip family that scales 64–5000 cores, with a taped‑out card of 1,088 minions (each core an RV64IMFC in‑order design, two harts per minion, hierarchical L1/L2 grouping). The RTL, firmware, simulator and software stack are public, target ggml/tinygrad style inference and support a shared‑memory SoC workflow; boards and cloud-accessible systems are available for testing.
AI-written summary · about
chapters (6)
- 0:00Introduction to open source AI
- 3:12Open platform for AI inference
- 8:50Espiranto hardware open sourcing
- 11:57Evolving open RTL infrastructure
- 13:21Community access and demos
- 16:29Q&A and closing remarks
related talks
24mReal World Results using Thousands of RISC-V Cores for AI and Beyond
13mKeynote: Taking RISC-V Intelligence Everywhere
40mAdvancing AI Application Development on RISC-V Platforms
18mLessons Learned in Using RISC-V for Generative AI and Where We Can Go from Here
10mAvoiding Amdahl's Law RISC-V Architecture Exploration for AI & ML Compute
20mRISC-V Spotlight: Expanding the RISC-V Horizon and Beyond
40mKeynote Panel: The Future of High Perfor...
19mAccelerating Edge AI with the Help of RISC-V
