Enabling System Standby With RISC-V Platform
summary
Implements Suspend to RAM (S3) and Suspend to Disk (S4) on a LicheePi board based on the XuanTie TH1520, moving platform-specific power logic into a PCU close to the core to avoid repeated OpenSBI/kernel handshakes and long hotplug delays. Achieves SoC suspend power under 10 mW and wake latency under 5 ms, and is upstreamed into firmware stacks and deployed on the Th1520-powered RuyiBook (JiaChen Version) laptop.
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chapters (8)
- 0:00Introduction to system standby
- 1:26What is system standby
- 5:49Challenges in non-book core handling
- 9:03System controller and book core issues
- 11:57Software framework adaptations
- 13:00Results on RUI Book product
- 14:50Roadmap and future plans
- 16:44Q&A session
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