ChipIN Centre: Accelerating India’s Journey in RISC-V
summary
ChipIN Centre provides centralized access to Synopsys, Cadence, Siemens/KeySight and other industry EDA suites, FPGA prototyping (Xilinx/AMD boards), Param Utkarsh supercomputing and MPW services tied to SCL for fabrication, plus packaging and post‑silicon bring‑up. 130+ RISC‑V SoCs enabled across embedded, IoT, security and AV use cases; quarterly MPW shuttles scaling 20→38 designs and a target of 100 student RISC‑V tapeouts in 3 years with on‑board FPGA proofs of concept and tracked 4,400 support tickets.
AI-written summary · about
chapters (6)
- 0:00Introduction to ChipIN
- 0:51ChipIN center infrastructure
- 9:58Grand challenges and support
- 11:36Academic tapeout programs
- 12:49Empowering the ecosystem
- 13:43Q&A and concluding remarks
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