Automating Design Space Exploration Using Advanced Simulation Technologies
summary
A spec-driven workflow combines an Instruction Set Simulator, trace-driven C++ microarchitectural models and Atlas Explorer to run early design space exploration using HDF5 traces and SDF trace formats. The stack automates bidirectional loops: freeze a model and sweep compiler flags, or freeze the workload and sweep pipeline knobs on an i8500-like multihart design, producing reproducible pass/fail filters and flame‑charted pipeline profiles. The open toolchain ties to the open-source Olympia simulator and supports virtual SoC digital twins plus post-silicon endrace ingestion.
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chapters (10)
- 0:00Introduction to simulation
- 1:28Shifting software development left
- 3:14Architectural performance models
- 5:39Analyzing performance data
- 7:00Automating design exploration
- 8:48Digital twin integration
- 10:14Software-hardware collaboration
- 12:03Reinventing customer journey
- 13:06RISC-V performance modeling
- 14:08Closing and next steps
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