~/talk

Verifying Out-Of-Order RISC-V Vector Extension With Open Source Tools

Talkat RISC-V Summit North America 2025 · 2025-10-22..10-23· [testing, open-source]
links:none on file
name:A. Kumar
links:none on file
slides:none on file

An open-source verification stack verifies an out-of-order RVV 1.0 implementation (plus BF16, bitmanip, crypto and dot product extensions) by combining Riescue C/D generated stimuli, a forked riscv_dv for updated RVV 1.0 opcodes, and rv_tester cosimulation that compares RTL to Whisper ISS at every instruction boundary. The flow finds bugs in complex micro‑sequences (crossing ROB boundaries, vlen=0 with nonzero vstart, element faults), exercises RCC-style memory consistency for multi-core (2–8 cores per cluster) designs, produces functional coverage, and successfully verifies a high‑performance OOO core.

AI-written summary · about

  1. 0:00Introduction and methodology
  2. 1:00Verification phases
  3. 2:39Design architecture overview
  4. 4:39Directed test framework
  5. 7:14Compliance testing
  6. 9:24Randomized testing
  7. 10:36Simulation and testbench
  8. 12:40Coverage and conclusions
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