The Continuum of RISC-V Compliance and Verification Testing

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" summary

Defines a practical boundary between simple ISA compliance and full DV: compatibility runs a few million instruction tests via riscv-binconfig and signature compare against an ISS, while industrial verification targets orders of magnitude more cycles (examples cited up to ~10^15 cycles) and months of cloud simulation (one open core uses 18 months with 50 simulators). Projects deliver reusable pieces — an open RVVI interface, virtual verification peripherals for interrupt/debug stimulation, and an Imperas verification IP that are already in use by several cores and near-silicon chips.

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" chapters (7)

1. 0:00Introduction and speakers
2. 1:04Compatibility testing overview
3. 2:50Architectural compatibility tests purpose
4. 8:05Verification approaches explained
5. 12:54Open Hardware verification efforts
6. 16:05Continuum between compliance and verification
7. 17:07Q&A session

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