~/talk

Beating the Benchmarks: Co-evolving the ISA and Development Tools

Talkat RISC-V Summit 2022 · 2022-12-13..12-14· [software-architecture]
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slides:none on file

An open workflow uses QEMU, GCC and LLVM to trace and profile EEMBC CoreMark, SPEC CPU 2017 floating‑point workloads and ECMAScript, then drives ISA changes backed by numbers. New rounding ops produce 9–19% speedups on hot FP paths; a tiny load‑FP‑immediate encoding uses about 5 bits to cover common immediates; conditional operation extensions (Ventana condops / XVentanaCondOps) save roughly two instructions per branchless pattern and reduce overall instruction count by about 1%, at the cost of ~16 opcode points.

AI-written summary · about

  1. 0:00Introduction
  2. 1:50Benchmarks
  3. 3:06Premature optimization
  4. 4:04Evolution
  5. 10:13Evolution Process
  6. 14:16Examples
  7. 18:01Case Studies
  8. 22:00Conclusion
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