RISC-V Zkt: Portable Timing Attack Resistance (via Dynamic Taint Analys...
summary
RISC-V’s Zkt (Data Independent Execution Latency Subset) promises instructions whose latency never depends on secret inputs; verification uses a full-system dynamic taint analysis emulator that instruments compiled binaries, attaches a shadow state to registers and memory, and flags secret-dependent loads, stores or branches. The tool implements propagation rules, maps violations back to source lines, runs near hardware speed (~10M instructions/sec), and finds real issues in production crypto while noting expected false positives for rejection sampling.
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chapters (6)
- 0:00Intro
- 0:46A Quarter of a Century of Timing Attacks Some Greatest Hits in asymmetric crypto TAJ Along the Years
- 2:40Basic Sources of Timing Leaks (That are avoidable with careful programming)
- 8:14Practical Testing Methods One trick: Repurpose "Use of Uninitialized Memory" detection.
- 14:20Taints in our Emulation Traditional RED and BLACK
- 20:37Instrumenting around False Positives Example: Rejection Samplers Need Special Instrumentation
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