SCAIE-V: A Scalable Open-source Interface for Flexible and Portable ISA Extensions
summary
An open-source interface called SCAIE-V exposes a portable adapter layer and a Java/ YAML toolchain that generates glue logic and a skiff module so custom instructions (combinational, multi-cycle, decoupled, control-flow) plug into very different cores. Prototype implements a MAC with four internal accumulators and auto-generated scoreboard/arbitration. Measured overheads: about 10% area overhead on a Vex/FPGA and ~4% on larger cores (rises if local scoreboard enabled); clock drops 2–6% on pipelines, ~16% on PicoRV32; taped out on 22FDX running 20–700 MHz.
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chapters (17)
- 0:00Introduction
- 1:06Key Features
- 1:48Scalable
- 2:22Flexible
- 2:56Flexible rescheduling
- 3:24Decoupled execution
- 4:23Custom control flow instructions
- 6:12GIF interface
- 7:08Sky5 tooling
- 7:55skiff
- 9:31Integration
- 10:07Source Code
- 11:45verilog
- 13:57area requirements
- 15:27other cores
- 16:31Clock frequency
- 19:41Questions
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