~/talk

HW-SW Co-development for RISC-V Based Secure ML Systems with the Sparro...

Talkat RISC-V Summit 2022 · 2022-12-13..12-14· [embedded-and-hardware, open-source]
name:Kai Yick
links:none on file
slides:none on file

Sparrow builds a low‑power RISC‑V ambient ML platform using Renode for full-system, pre‑silicon co‑development and targets OpenTitan roots of trust including the OpenTitan bignum accelerator (added as a custom peripheral with stack registers). The stack runs seL4 + Rust for isolated apps across three cores (secure, management, ML) and uses RISC‑V Vector v1.0 support plus trace extraction (speedcope/pprof formats) to drive performance tradeoffs; RTL freeze and tape‑out are planned later in 2023.

AI-written summary · about

  1. 0:00Introduction to Sparrow
  2. 1:51What is Sparrow
  3. 3:15Co-design flow overview
  4. 6:26Reference design and block diagram
  5. 8:14Project status and timeline
  6. 8:34Program updates with Michael
  7. 9:16Country OS and Rust integration
  8. 11:04Reload simulation updates
  9. 14:35Enhancing Renode flexibility
  10. 15:59Performance tracing in Renode
  11. 17:46Future plans and releases
  12. 19:12Q&A session
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