Getting the Most out of the LLVM Auto Vectorizer for RISC-V Vectors (RVV)
summary
LLVM 14 enables VLA autovectorization for RISC‑V but SiFive adds an internal RVVLA removes remainder loop implementation that computes VL each vector iteration, yielding mixed SPEC2006 results (noticeable wins overall, regressions in hmmer and libquantum) and code‑size shifts. LLVM’s type system cannot express fractional LMUL encoding problem, loop vectorizer heuristics and codegen need fixes, and SLP still forces power‑of‑two trees and straight‑line only. Practical advice: use LLVM vectorizer reports, avoid pragma vector_width for RVV, apply IVDEP or loop FP‑reassoc pragmas, or disable vectorization/SLP when needed.
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chapters (7)
- 0:00Introduction to Vectorization
- 1:08Loop Vectorization History
- 4:47Technical Challenges
- 7:19User and Terminology Issues
- 9:48Best Practices and Pragmas
- 14:15SLP Vectorization Limitations
- 17:37Summary and Conclusion
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