PQCP Support for RISC-V Vector, Future Keccak Extensions
summary
PQCP supplies production C implementations of ML-KEM, ML-DSA, SLH-DSA with formal type and memory-safety checks and CI running on ~300 targets; RISC-V Vector support using vector intrinsics is merged (five days ago) and yields 2–4x speedup vs scalar and ~30–50% gains from auto-vectorization with newer compilers; the RVI PQC TG proposes a Keccak single-instruction: 1600-bit / 25x64b vector op that reduces a ~2,000-instruction SHAKE hotspot to ~40 cycles in simulation, but no hardware prototype exists yet.
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chapters (11)
- 0:00Introduction and PQC update
- 3:21Government mandates for PQC
- 5:30PQC adoption in internet traffic
- 7:15Post-Quantum Crypto Alliance
- 9:05ML-KEM implementation strategy
- 10:29RISC-V vector support in ML-KEM
- 11:11Performance benchmarks on RISC-V
- 13:38Formal verification and security checks
- 15:24ML-DSA current backends
- 16:05Proposed Keccak instruction for RISC-V
- 17:34Future work and Q&A
related talks
19mThe RISC-V Vector Cryptographic Extensions in the Real World
50mProgress in Standardizing Cryptography Extensions for RISC-V Processors
20mBenchmarking RISC-V Post-Quantum
21mThe RISC-V Vector Cryptography Extensions
11mRISC-V ISA Cryptographic Extensions Proposal Summary
39mPQC in Action: From Global Standards to Secure Deployments
18mMaking the Case for a Keccak Instruction
23mDevelopment of the First Open-Source Implementation of the RISC-V Vector Cryptography Extension
