The Future of Mission Critical Edge Compute Is RISC-V
Talkat RISC-V Summit North America 2024 · on Tuesday, 2024-10-22· at 14:55· Grand Ballroom H (Level 1)·
summary
Mission-critical edge needs high-throughput MPUs with time-and-space partitioning, fault isolation, and redundancy; RISC-V delivers WorldGuard isolation (up to 32 worlds), MMU/physical memory protection, hypervisor support and dual-core lockstep for fault tolerance. Vector extensions boost parallel AI/ML throughput—claimed up to 144% performance improvement versus scalar loops—and are dynamically resizable. Microchip ships a new 64-bit MPU line, PIC64HX, targeting space (radiation and longevity), aviation dissimilar-redundancy, and industrial TSN and post-quantum readiness.
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chapters (7)
- 0:00Introduction and agenda
- 0:21Defining mission-critical
- 0:53Target markets and use cases
- 12:43Multicore flexibility
- 14:30Isolation and AI performance
- 19:25Microchip product portfolio
- 20:25Conclusion
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