RISC-V Server SoC Standardization

on YouTube ↗16m

" summary

A RISC-V server SoC specification defines concrete hardware requirements so a single binary OS image boots and runs across compliant systems. It mandates the advanced interrupt architecture with nanosecond timebase and minimum interrupt identities, requires an IOMMU for all DMA-capable devices with specified ID and PASID widths, and prescribes PCIe root-complex routing, ordering, and error rules. RAS targets include 800 FITs → ~150 years per server, ~5 days across 10,000 servers, and QoS uses SSQIDs and CBQ registers; Redfish/PLDM/MCTP manageability is specified.

AI-written summary · about

" chapters (8)

1. 0:00Introduction to server specs
2. 1:36Server platform architecture
3. 4:49Clocks and interrupt control
4. 6:35IOMMU and memory protection
5. 8:01PCIe subsystem integration
6. 10:15RAS implementation guidelines
7. 13:10Quality of service control
8. 15:06System manageability standards

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