~/talk

RISC-V: Changing the Way AI/ML Accelerators and Computing Infrastructure Are Built

Talkat RISC-V Summit North America 2024 · on Wednesday, 2024-10-23· at 13:55· Grand Ballroom H (Level 1)· [machine-learning]
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Stream Computing describes an AME matrix extension built as tile/block matrix instructions with an 8+8 register design, elemental-wise ops and RVV-decoupled semantics, plus an open-source repo moving from v0.2 to v0.5. A mass-production STCP920 NPU card (FP16/INT8) ships thousands of units since 2022 and runs a full LLVM/AI-compiler stack with operator ports and an RVV/Matrix-enabled runtime. That stack powers a deployed large-model service—a 1,000P computing center project using 1,000 NPU cards (now ~150P live) and a 5,000-category knowledge graph for smart-community NLP.

AI-written summary · about

  1. 0:00Introduction to AI and RISC-V
  2. 2:30Matrix extension development
  3. 8:17Implementation and evaluation
  4. 9:40Stream Computing products
  5. 10:36Software stack and compiler
  6. 14:48Smart community case study
  7. 17:19Talent cultivation and closing
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