Keynote: RISC-V at NVIDIA: One Architecture, Dozens of Applications, Billions of Processors

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" summary

NVIDIA reports shipping 1–2 billion RISC‑V cores in 2024 with about 10–40 RISC‑V microcontrollers per chip, using a common hardware/software architecture that reuses a Paragon subsystem and one software stack across ~30 applications. Implementations include 64‑bit and area‑optimized 32‑bit cores, a GSP GPU System Processor that enforces isolation via a separation kernel for cloud vGPU tenants, and a DL accelerator with a 1024‑bit RVV vector unit; custom extensions like 2 KB page extension deliver up to 50% legacy performance gains.

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" chapters (6)

1. 0:00Introduction and history
2. 3:14RISC-V adoption at NVIDIA
3. 8:45Custom extensions and security
4. 12:23GSP and GPU management
5. 16:21AI inferencing with RISC-V
6. 19:14Success factors and summary

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