Update on RISC-V Confidential VM Extension (CoVE)
summary
Proposes a RISC‑V memory tracking table (MTT) ISA extension that checks the final physical address after page-table walks and enforces per‑supervisor‑domain allow/deny decisions, biased for large pages and cacheable to avoid more than one extra load in fast paths. Provides reference software: a TSM implementation using the H extension, KVM patches and a pure‑software proof‑of‑concept that runs without custom silicon. Specification split: smmt in the ISA tree, CoVE ABI and guest/TSM ABI as non‑ISA docs, target public review Q4'23.
AI-written summary · about
chapters (7)
- 0:00Introduction to CoVE update
- 1:03Supervisor domains concept
- 2:49Memory Tracking Table details
- 4:13CoVE architecture models
- 5:55ABI design rationale
- 8:26Software-defined CoVE approach
- 9:30Discussion and next steps
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