RISC-V irqbypass with KVM
summary
Proposal implements kvm_arch_irq_bypass_add_producer for RISC-V using AIA VS files and MRIFs so devices can inject MSIs without hypervisor mediation; RISC-V IOMMU maps MRIF host-PAs and must emit notice MSIs when MRIF bits set, so the IOMMU instantiates an IRQ domain and implements irq_set_vcpu_affinity to pin notifications to a VCPU. A proof‑of‑concept exists with IOMMU→KVM callbacks and uAPI choices pending for notice‑MSI delivery policy and accounting differences.
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chapters (6)
- 0:00Introduction to IRQ bypass
- 1:28RISC-V IRQ bypass basics
- 5:17KVM and IOMMU communication
- 9:54Open discussion and challenges
- 16:47Comparison with ARM implementations
- 19:42Q&A and summary
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