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SBI Supervisor Software Events

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Adds an SBI extension that injects high‑priority supervisor events from M mode that preempts all traps and interrupts by diverting execution to an SSE entry context and later resuming via an SBI completion call. Proof‑of‑concept uses Spike and kernel patches (≈0x1f000 lines of C across kernel and PSBI/OpenSBI pieces), targets PME overflow and RAS faults, and shows faster delivery with reduced instructions from ~1,600 to ~800 for the PMU case. Works but needs register‑save ABI, task‑location annotations, nesting/priority rules, and SBI support; spec is under review.

AI-written summary · about

  1. 0:00Introduction to SBI
  2. 1:23How supervisor software events work
  3. 3:10Event priorities and nesting
  4. 5:39Pros and cons of SBI vs PMU
  5. 8:06Retrieving current task in exception path
  6. 10:49ABI and register saving concerns
  7. 12:15Performance measurements and proof of concept
  8. 13:46Current status and timeline
  9. 14:06Q&A: Jitter and interrupt handling
  10. 15:30Q&A: Pseudo NMI vs SBI events
  11. 16:35Q&A: Exception path and interrupt masking
  12. 17:23Q&A: Software simulation and testing
  13. 19:07Q&A: Handling R errors during execution
  14. 19:49Q&A: ABI stability and future evolution
  15. 20:32Q&A: Programmatic annotation of events
  16. 21:15Q&A: ABI violations and TP usage
  17. 22:19Q&A: Finding task struct locations
  18. 22:41Q&A: Preemption and nesting of S events
  19. 23:45Q&A: Debugging and backtrace support
  20. 24:47Q&A: Use case for critical section profiling
  21. 25:08Q&A: Potential breaking changes
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