Harvesting Memory-bound CPU Stall Cycles in Software with MSH
Talkat 18th USENIX Symposium on Operating Systems Design and Implementation (OSDI '24) · 2024-07-10..07-12·
summary
A software system called MSH instruments binaries via profile-guided binary instrumentation, adds prefetching and bounded scavenger yields, and uses runtime scheduling to assign and steal scavengers across threads. It harvests memory-bound stall cycles by on-demand concurrency scaling without kernel or SMT changes. Evaluation with pointer‑chasing and scanning scavengers shows up to 72% of SMT throughput under latency SLOs where SMT must be disabled, and combining MSH with SMT and kernel scheduling yields higher overall throughput.
AI-written summary · about
chapters (8)
- 0:00Motivation for MSH
- 1:43Drawbacks of SMT
- 3:33MSH overview
- 4:15Design and workflow
- 7:15Runtime architecture
- 8:01Technical implementation
- 10:38Evaluation results
- 13:39Discussion and conclusion
related talks
13mHarvesting Spare CPU Resources in Container Systems
18mHarvesting Sub-Microsecond CXL Memory Stalls with LiteSwitch
44mRestartable Sequences: Scheduler-Aware Scaling of Memory Use on Many-Core Systems
35mOpening the Box: Diagnosing Operating-System Task-Scheduler...
21mPreview: Operating Systems
26mCommSec D2 - Hiding Tasks via Hardware Task Switching
38mMaximizing Heterogeneous Memory Bandwidth in Multi-Socket Systems
31mHMSDK: Enhancing Software Support for CXL Memory