High-throughput and Flexible Host Networking for Accelerated Computing
Talkat 18th USENIX Symposium on Operating Systems Design and Implementation (OSDI '24) · 2024-07-10..07-12·
summary
ZeroNIC is a co-designed FPGA NIC plus software stack that physically separates control/data separation to deliver a zero-copy data path to CPU and GPU memory while running Linux TCP in the kernel. The prototype saturates 100 Gbps with a single TCP flow using 17% of a single CPU core, uses under 10 MB NIC state to support ~10,000 flows, and boosts NCCL and Redis throughput by 2.66X and 3.71X versus Linux TCP on a Mellanox ConnectX-6, while tolerating drops and reordering.
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chapters (5)
- 0:00Introduction and motivation
- 1:53The ZeroNIC design concept
- 4:38Addressing receiver challenges
- 6:00System architecture overview
- 10:46Prototype and evaluation
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