HiSilicon Performance Monitor Control Unit
summary
Performance Monitor Control Unit (PMCU) offloads core PMU work to an external DMA-backed controller that configures events, switches them, and writes samples to memory, Performance Monitor Control Unit (PMCU). Demo shows ten samples at ~4 ms each and the motivation is concrete: traditional per-CPU PMU sampling can raise latency (an observed 50% latency increase in cybench) and consumes CPU cycles. Implementation uses perf_event auxtrace, exposes sysfs knobs, and works functionally, but concurrent CPU vs external accesses lack synchronization and raise correctness and security problems.
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chapters (10)
- 0:00Introduction to PMCU
- 1:49Problems with traditional PMUs
- 3:19Hardware design of PMCU
- 4:50Software design framework
- 6:59Demo of PMCU usage
- 8:33Main challenges faced
- 12:11Security concerns with external PMU access
- 14:17Workarounds and alternatives
- 17:07Performance overhead discussion
- 18:34Q&A and closing remarks
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