Power Debugging with JTAG
summary
JTAG becomes a practical, non-intrusive channel to monitor clocks, PMU counters, voltage rails and bus stats in real time using OpenOCD‑compatible servers and Python libraries exposed over telnet. The demo shows a power dashboard that reads/writes registers, reports clock and power-state transitions that the kernel/console misses, and surfaces PMU event counts (32/64‑bit) for CPUs and peripherals. Default JTAG speeds around 500 kHz give negligible overhead while observing video decode and other workloads, and a register-description layer makes the tool portable across SoCs like i.MX7ULP.
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chapters (6)
- 0:00JTAG bug detection intro
- 11:28JTAG real-time visualization
- 20:20JTAG register/memory access
- 26:44PMU counters for debugging
- 34:01JTAG integration challenges
- 38:00Conclusion
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