A RISC V ISA Extension for Ultra Low Power IoT Wireless Signal Processing
summary
CEA Leti and Codasip implement a RISC-V extension and microarchitecture tweaks to run LoRa/BLE-style physical layers as software-defined radio on a low-power core, using Codasip Studio to iterate quickly. A Codasip BK-family core synthesized in GF 22nm is ~41k LUTs, >1 GHz baseline, 3.5 µW/MHz; adding 14 custom instructions increases area modestly but keeps power nearly unchanged — zero-cost power — while reducing algorithm cycle counts up to about 5x. Rapid turnarounds with Codasip Studio produce a working, updateable solution.
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chapters (6)
- 0:00Introduction and overview
- 0:32Company and partner profiles
- 1:40IoT design challenges
- 4:08RISC-V custom extensions
- 6:13Implementation and results
- 9:10Conclusion
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