RISC V Software State of the Union

on YouTube ↗20m

" summary

RISC-V success hinges on software not silicon, and the concrete progress is visible: GCC with RISC‑V and vector support is upstream, LLVM becomes an official branch, and toolchains now emit vector intrinsics and optimized FFT kernels compatible with CMSIS‑DSP. OS work includes AWS-certifies FreeRTOS and a Linux kernel approaching full production with more drivers. Simulators (Spike and others) are kept current for the vector ISA. SiFive releases Shield and secure-boot primitives, while coordination of open-source stacks remains the big remaining task.

AI-written summary · about

" chapters (8)

1. 0:00The importance of software
2. 1:44Lessons for RISC-V success
3. 3:53State of the software union
4. 6:20Platform software status
5. 8:36Survey of development tools
6. 10:43OS and simulator environment
7. 13:36Vector programming progress
8. 16:11Community growth and outlook

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