Next Generation of GAP8 - IoT App Processor for Inference at the Very Edge
summary
GAP9 targets ML at the ultra-low-power edge, claiming support for problems up to 10x larger at up to 5x less power than GAP8 by using GF22 FDX, triple on-chip RAM, an internal cluster clock to 400 MHz, on-the-fly weight compression, and hardware encryption. It adds a trans-precision FPU (FP32, FP16 IEEE, bfloat16, bfloat8), an LDO that reaches a ~1 mW state in microseconds for fast wake, and an AutoTiler tool that generates DMA code for explicit memory management. A 20% cycle-accurate simulator and dev boards arrive early 2020.
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chapters (8)
- 0:00Introduction
- 0:33Market and Vision
- 1:51Processor Design Philosophy
- 3:54GAP8 Overview
- 6:26GAP9 Advancements
- 11:26Software and Toolchain
- 16:42Development and Ecosystem
- 19:32Instruction Set Extensions
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