~/talk

Introducing Scalable New Core IP for Mission Critical Use

Talkat RISC-V Summit 2019 · 2019-12-09..12-12· [embedded-and-hardware]
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Claims a 100% functional correctness guarantee for RISC‑V cores by proving equivalence between a formal RISC‑V spec and implementations written in the Kami proof‑assistant language, using machine‑checkable proof‑certificates and a formally verified compiler that emits RTL. Replaces slow, unscalable model checking with semi‑automatic proofs that need only medium human effort, and extends verification to code generators so many core variants (in‑order, out‑of‑order, different pipelines and VM support) inherit the proof.

AI-written summary · about

  1. 0:00Intro
  2. 0:47Requirements for Automotive safety certification
  3. 3:09New mission-critical design methodology
  4. 8:38Single Formal Spec to rule them all
  5. 10:45Formal Verification of Generators
  6. 11:39Achieving Functional Correctness
  7. 15:14Summary
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