RISC V LLVM: Towards A Production-Ready LLVM-Based Toolchain
summary
LLVM backend for RISC-V now compiles real code and passes the GCC torture suite 100% for RV32I and RV64I across all opt levels, implements an MC layer, unit-test harnesses and a test tool called bicop as a proposed ABI golden model, and accepts third‑party work (Andes, Qualcomm/CodeAurora, NXP, Codasip) including lld and compressed‑ISA patches. About 20k lines added (≈55% tests), roughly one third of patches are upstream, and SPEC and larger app benchmarking are next.
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chapters (7)
- 0:00Introduction and motivation
- 2:26Current implementation status
- 5:17Implementation approach and challenges
- 9:30RISC-V ISA complexity
- 13:24Upstreaming and community growth
- 17:40Upstream progress and future steps
- 21:54Next steps and conclusion
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