A Practical Implementation Of A Platform Level Interrupt Controller (PLIC)
summary
A fully functional PLIC implementation claims compliance with the RISC‑V spec while introducing dynamic register/memory map generation so the IP auto-builds a minimal, practical register layout and documentation from parameters. It supports parameterized sources/targets (examples: 2 targets/16 priorities on a 32‑bit bus; 64 sources on a 64‑bit bus; some users demand >1000 sources), packs priority to nibble boundaries (priority packed to nibbles), and uses auto-claim-on-read plus dummy-write completion; source on GitHub under a BSD‑style license.
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chapters (12)
- 0:00Introduction
- 0:15Our History
- 0:35The Goal
- 0:50Flexibility
- 1:34Design
- 2:34Memory Map
- 3:23Dynamic Memory Map
- 4:03Pack Priority
- 4:42ID Register
- 5:24Examples
- 5:52Report
- 6:12Memory Mapping








