FireSim: Cycle Accurate Rack Scale System Simulation Using FPGAs In The Public Cloud
summary
FireSim compiles Chisel/RTL into FPGA simulators on EC2 F1, packs four Rocket cores per FPGA to yield 128 simulated cores per F1, and runs rack-scale experiments at roughly 3–5 MHz aggregate (about 400M–13B simulated instructions/sec depending on scale). The system models 200 Gbps links, configurable switches and topologies, boots unmodified Linux and real apps (memcached), reproduces known tail-latency effects, and supports both cycle-accurate and faster functional network modes.
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chapters (14)
- 0:00Intro
- 0:59Why simulate datacenters? Next-gen datacenters won't be built only from commodity components
- 2:18and custom HW is changing faster than ever
- 5:01Build the hardware: "Tapeout"
- 5:22Write/Use a software simulator
- 6:45Build a HW-accelerated simulator: DIABLO
- 8:15Evaluating Systems for Evaluating Computer Systems
- 10:15How do we improve?
- 11:38FireSim Target Design (Servers + Network)
- 13:34Mapping a simulation to EC2 F1
- 14:16FAME-1 Transforming RTL
- 15:17Single-host-node simulation metrics
- 17:27Reproducing tail latency effects from real systems
- 19:21Scaling to a 1024 Node RISC-V Datacenter
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