From Eyewear to Silicon: RISC-V for Low-Power AI in Next-Generation Smart Glasses
summary
Luxottica builds a RISC‑V based SoC using the PULP ecosystem plus custom IP to hit sub‑35 mW system budgets for 150 mAh glasses running 16 hours. ISA extensions deliver 10x DSP speedup versus baseline RISC‑V, multicore parallelism adds another 10x over single core, the Smart Filtering Unit runs ANC below 5 mW, six‑mic beamforming shows ~10x latency and ~2x power versus multicore, and a reconfigurable integer conv engine gives ~5x end to end energy on object detection.
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chapters (13)
- 0:00Introduction to smart glasses
- 1:15Smart glasses vision and applications
- 5:26Power constraints in smart glasses
- 7:56Approach to silicon design
- 10:05RISC-V as the key pillar
- 12:09Extending RISC-V ISA for efficiency
- 14:14Parallelization with multi-core RISC-V
- 15:39Specialized computing for AI
- 17:03Smart filtering unit for audio
- 21:03AI inference acceleration
- 23:55Synergy between components
- 25:25Conclusion and future outlook
- 26:36Q&A session
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