Accelerating RISC-V Innovation with openMPACT Tools from Google
summary
Google Research provides Impact Sim — an ISA-description-driven C++ simulator SDK that claims a simple core up in under a week and generates assembler/disassembler, GDB server and semi-hosting out of the ISA files. The Impact RISC‑V build runs 32/64-bit and vector RV A23/RV M23 profiles, plugs into Renode, and supports per‑instruction latencies and multi‑core debugging. A standalone Coral NPU model and Python/UVM co‑simulation stack (PyBind11, DPI bridge, instruction‑by‑instruction equivalence checker) are used as golden references and are open source.
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chapters (13)
- 0:00Introduction to presenters
- 0:23Overview of openMPACT tools
- 1:48Impact Sim SDK core features
- 3:36Developer velocity and flexibility
- 5:23RISC-V simulator implementation
- 7:48System modeling and semi-hosting
- 8:54Coral NPU RISC-V compliant accelerator
- 9:16MPAC RISC-V framework implementation
- 10:22Python verification environment
- 11:27UVM co-simulation setup
- 12:33Future plans for verification IP
- 12:56Conclusion and resources
- 13:31Q&A session begins
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