Matrix Extensions for RISC-VDelivering on the Promise
summary
RISC-V standardization splits matrix support into four concrete ISAs: a dot product fast track already through internal review, an IME that uses no new state aiming for an end‑of‑year ratification, a VME that adds explicit matrix state still resolving ABI and security save/restore issues, and a greenfield ZVM/Hyomi matrix engine with a first draft expected later this year. Compiler work includes LLVM/MLIR scalable‑tile abstraction and GCC intrinsic prototypes to let one MLIR dialect target all four; all extensions remain optional in profiles.
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chapters (9)
- 0:00Introduction
- 0:25Matrix extensions update
- 3:34Design space analysis
- 5:59Four extension tiers
- 8:04Extension complexity timeline
- 10:53Forking software ecosystem risk
- 11:57Unified software abstraction approach
- 13:45Current state and future plans
- 14:28Q&A session
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