~/talk

Enabling High-Performance Storage for RISC-V

Talkat RISC-V Summit Europe 2026 · 2026-06-08..06-12· [databases]
speakerdeck:davecremins
links:none on file
slides:none on file

Lustre client ported to RISC-V by adding architecture support and three core changes (build target, 64-bit erasure coding paths, fallback header) and landing 7 upstream patches merged to master. Testing uses two QEMU RISC-V VMs (Ubuntu 24.04, kernel 6.8.4) plus an x86_64 server, module loading, mount, file IO and standard benchmarks pass, while MGS/MDS/OSS remain on other architectures. CI with Gerrit/CloudV catches regressions moving forward.

AI-written summary · about

  1. 0:00Introduction and speaker intro
  2. 0:21Open-Silicon and company overview
  3. 1:02RISC-V readiness for HPC
  4. 2:24Lustre as HPC storage solution
  5. 3:53Lustre architecture components
  6. 5:00Identifying architecture gaps
  7. 6:43Patch separation and compatibility
  8. 8:08Core RISC-V patches for Lustre
  9. 9:33Dependency matrix and hardware constraints
  10. 10:15Testing with QEMU and CI/CD
  11. 11:17Test results and benchmarking
  12. 12:19Collaboration with Lustre community
  13. 13:25Upstream journey and timeline
  14. 13:47Future-proofing with CloudV
  15. 14:31Summary and closing remarks
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