Accelerate RISC-V DSA design with Virtual Board Builder

on YouTube ↗14m

" summary

A browser GUI builds a virtual SoC by drag-and-drop and configures an ANDES D45 model, then imports a speech‑recognition network, generates C/weights, and runs it on a cycle-accurate simulator. Coverage-guided profiling points at a hot for‑loop; three custom instructions — vector prod, we_dot, we_sub_e32 — are defined, a ZM extension shared library and an accelerated D45 virtual board are generated, assembly is injected, and the rerun shows roughly 50% performance improvement.

AI-written summary · about

" chapters (9)

1. 0:00Introduction to demo
2. 1:06Building virtual SoC
3. 3:19Importing AI application
4. 6:15Running on virtual platform
5. 7:50Profiling performance
6. 9:16Customizing instructions
7. 11:06Modifying virtual board
8. 12:26Reprofiling and results
9. 13:30Conclusion and Q&A

" related talks

• 11mDemo: Accelerating SW Development and Validation of RISC-V Based DesignsKamal Desai · RISC-V Summit North America 2023
• 17mDemo: RISC-V Models for Verification, Software Development and Architectural Explor...Larry Lapides · RISC-V Summit 2022
• 01h 10mWhy RISC-V Through ISA Customization DemonstrationKeith Graham · RISC-V Summit North America 2023
• 13mDemo: RISC-V as an Enabler of Heterogeneous ComputeZdenek Prikryl · RISC-V Summit North America 2023
• 10mRISC-V Virtual Platforms for Early RISC-V Embedded Software DevelopmentKevin McDermott, Lee Moore, Hugh O’Keeffe · 8th RISC-V Workshop Barcelona 2018
• 16mEfficient debug and trace of RISC-V systems: a hardware/software co-design approachOana Alexandra Lazar, Henrique Mendes, Angelo Maldonado-Liu · RISC-V Summit Europe 2025
• 11mFast Virtual Platforms for Custom RISC-V ProcessorsZdenek Prikryl, Lukas Jünger · RISC-V at embedded world 2024
• 21mA Comparative Analysis of RISC-V Architecture Based on the RISC-V SoC DV ExperienceMoonki Jang · RISC-V Summit North America 2023