Exploring RISC-V architectures with VPSim, a virtual prototyping environment
summary
VPSim is a CEA List virtual-prototyping environment that claims a practical accuracy vs. speed compromise and now ships open source. It assembles Arm and RISC‑V CPU models, NoC, multi‑level memories, SystemC/TLM and FMI bridges, and a Python platform builder. A recent automotive study compares a quad‑core Arm v8, a RISC‑V core, and a RISC‑V accelerator, reporting instruction counts and L1/L2/L3 and NoC counters for each configuration. Roadmap includes chiplet awareness and photonic interconnect exploration.
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