~/talk

Andes High Value RISC-V Processors and Their Application

Talkat RISC-V Summit Europe 2024 · 2024-06-24..06-28· [embedded-and-hardware]
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slides:none on file

Andes presents concrete CPU IP updates: an TSMC 7nm test chip and evaluation board built around an AX45MP + NX27 RVV at 2.2 GHz running OpenSUSE, demonstrating software porting works; roadmap adds 8→16-cluster AX45MPV with RVV VL up to 2K and eight-stage pipelines. Product line includes out-of-order AX65 (claimed 2.6 GHz, ~8.25 SPECint) and upcoming AX66/AX67 with RVAv23/24 features, hypervisor and coherence, plus ISO26262 automotive-grade certified parts for embedded and AI applications.

AI-written summary · about

  1. 0:00Introduction to Andes RISC-V
  2. 1:52RISC-V for AI and ML
  3. 4:00Vector Processors for AI
  4. 5:30MPV Series Roadmap
  5. 6:17Application Processor Series
  6. 8:28A66 and A67 Processors
  7. 9:56Andes RISC-V Roadmap
  8. 10:16Demo Board Overview
  9. 11:18Poster Sessions Overview
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