Simulate, trace, and evaluate a RISC-V system leveraging very long vectors
summary
A QEMU-based RAV tracing plugin runs RISCV vector binaries on a laptop and produces instruction counts, per-phase scalar/vector breakdowns, and time-series of vector length so programmers can see actual behavior. Targets the EPAC accelerator with 256 double-precision elements (≈16,000 bits) per vector. Example results show average VL 32 of 256 and phase vectorization as low as 7% vector instructions, guiding loop-collapsing and blocking changes that raise VL toward the hardware maximum and produce measured speedups on real EPAC silicon.
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chapters (10)
- 0:00Introduction to RAB
- 1:26EPAC chip and vector units
- 2:29Demo of vectorized code
- 4:17Tracing with RAB plugin
- 5:23Instrumenting code regions
- 6:29Analyzing instruction traces
- 7:12Compiler vectorization insights
- 8:17Vector length evolution
- 9:20Optimizing loop structures
- 10:03Quantifying plugin benefits
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