Fast Virtual Platforms for Custom RISC-V Processors
summary
Claim: an end-to-end flow turns a single CODAL description into RTL, an LLVM-aware SDK, and a Sim5 plugin for MachineWare virtual platforms so teams can run full-system software months before silicon. Demo: a custom RISC‑V instruction that encodes a number and emits GPIO signals to drive a 7‑segment display, compiled by the generated toolchain and executed on a Free OS image inside the virtual platform — it runs and shows the GPIO updates live.
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chapters (6)
- 0:00Introduction and presenters
- 1:08Why custom RISC-V processors
- 3:15Need for virtual prototypes
- 5:25Virtual platform demo setup
- 7:10Live demo execution
- 10:21Summary and Q&A invitation
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